rh108a 1 rh108afc operational amplifier the rh108a is a precision operational amplifier particu- larly well-suited for high source impedance application- srequiring low offset and bias currents and low power- consumption. the wafer lots are processed to linear technologys in- house class s flow to yield circuits usable in stringent- military applications. for complete electrical specifications, performance curves and applications information, see the lm108a/lm108 data sheet. l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. supply voltage ........................................................20v differential input current (note 1) .......................10ma input voltage (note 2) ............................................ 15v output short-circuit duration .......................... indefinite operating temperature range................ C55c to 125c storage temperature range ................... C65c to 150c lead temperature (soldering, 10 sec) .................. 300c (note 1) description absolute maximum ratings burn-in circuit top view v + comp2 comp1 Cin out nc +in v C (case) 8 7 5 2 1 4 h package 8-lead to-5 metal can 3 6 C + 1 2 3 4 8 7 6 5 top view comp1 Cin +in v C comp2 v + out nc j8 package 8-lead cerdip C + top view w package 10-lead cerpac 1 5 4 3 2 10 6 7 8 9 nc guard Cin +in guard compin compout v + out v C package information C + 20v C20v 2 3 200 10k 10k 4 6 33pf 8 1 C + 20v 3v C20v rh108a bi 2 3 249k 4 6 1.5k 30pf 8 1 7 7 or
rh108a 2 rh108afc (preirradiation, note 4) note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: for supply voltages less than 15v, the maximum input voltage isequal to the supply voltage. table 1: electrical characteristics symbol parameter conditions notes t a = 25c sub- group C55c t a 125c sub- group units min typ max min typ max v os input offset voltage 0.5 1 1.0 2,3 mv v os temp average tempco of offset voltage 3 5.0 v/c i os input offset current 0.2 1 0.4 2,3 na i s temp average tempco of offset current 3 2.5 pa/c i b input bias current 2.0 1 3.0 2,3 na a vol large-signal voltage gain v s = 15v, v out = 10v r l 10k 80 4 40 5,6 v/mv cmrr common mode rejection ratio 96 1 96 2,3 db psrr power supply rejection ratio 96 1 96 2,3 db input voltage range v s = 15v 3 13.5 13.5 v v out output voltage swing v s = 15v, r l = 10k 13 4 13 5,6 v r in input resistance 3 30 m i s supply current (note 6) 0.6 1 0.4 2 ma symbol parameter conditions notes 10krad (si) 20krad (si) 50krad (si) 80krad (si) units min max min max min max min max v os input offset voltage 0.5 0.5 0.5 1.0 mv i os input offset current 0.3 0.3 0.3 0.3 na i b input bias current 2.0 2.0 2.0 4.0 na a vol large-signal voltage gain v s = 15v, v out = 10v r l 10k 98 98 90 86 db cmrr common mode rejection ratio 96 96 84 70 db psrr power supply rejection ratio 4 96 96 84 70 db input voltage range 3 13.5 13.5 13.5 13.5 v v out output voltage swing 13 13 13 13 v r in input resistance 3 30 30 30 30 m i s supply current 0.6 0.6 0.6 0.6 ma (preirradiation, note 4) table 1a: electrical characteristics note 3: guaranteed by design, characterization or correlation to othertested parameters. note 4: 5v v s 20v preirradiation, 5v v s 15v postirradiation, unless otherwise noted. note 5: v s = 15v, v cm = 0v, t a = 25c unless otherwise noted. note 6: 25c t a 125c.
rh108a 3 rh108afc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number c 11/10 note 4 revised and added to power supply rejection ratio. 2 (revision history begins at rev c) table 2: electrical test requirements mil-std-883 test requirements subgroup final electrical test requirements (method 5004) 1*,2,3,4,5,6 group a test requirements (method 5005) 1,2,3,4,5,6 group c and d end point electrical parameters (method 5005) 1 *pda applies to subgroup 1. see pda test notes. pda test notes the pda is specified as 5% based on failures from group a, subgroup 1, tests after cooldown as the final electrical test in accordance with method 5004 of mil-std-883 class b. the verified failures (including delta parameters) of group a, subgroup 1, after burn-in divided by the total number of devices submitted for burn-in in that lot shall be used to determine the percent for the lot. linear technology corporation reserves the right to test to tighter limits than those given. total dose bias circuit 30pf C + 15v 8v C15v rh108a tdbc 2 3 10k 4 6 8 1 7 10k 0.1f 0.1f
rh108a 4 rh108afc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 1989 id no. 66-10-0156 ? lt 1110 rev c ? printed in usa open-loop gain common mode rejection ratio power supply rejection ratio total dose krad (si) 1 open-loop gain (v/mv) 140 130 120 110 100 90 80 70 10 100 1000 rh108a g04 v s = 15v v out = 10v r l = 10k total dose krad (si) 1 common mode rejection ratio (db) 160 150 140 130 120 110 100 90 80 70 10 100 1000 rh108a g05 v s = 15v v cm = 13.5v total dose krad (si) 1 power supply rejection ratio (db) 160 140 120 100 80 60 40 20 10 100 1000 rh108a g06 typical performance characteristics input offset voltage input bias current input offset current total dose krad (si) 1 input offset voltage (mv) 1.5 1.0 0.5 0 C0.5 C1.0 C1.5 C2.0 10 100 1000 rh108a g01 v s = 15v v cm = 0v total dose krad (si) 1 input bias current (na) 6 4 2 0 C2 C4 C6 C8 10 100 1000 rh108a g02 v s = 15v v cm = 0v total dose krad (si) 1 input offset current (na) 1.5 1.0 0.5 0 C0.5 C1.0 C1.5 C2.0 10 100 1000 rh108a g03 v s = 15v v cm = 0v
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